The present invention relates to a burn-in test method and an apparatus thereof for placing a semiconductor wafer on which a plurality of semiconductor devices are integrated under a high temperature environment and applying voltage to each semiconductor device to screen initial defects of each semiconductor device.
As one of the conventional burn-in tests of semiconductor devices, there exists a method for performing a burn-in test in a semiconductor wafer state prior to separation of the semiconductor wafer on which a plurality of semiconductor devices are integrated into respective devices (e.g., refer to Patent Document 1). Such a burn-in test in a semiconductor wafer state is referred to as a wafer burn-in test.
In this wafer burn-in test, a cartridge housing a device under test with a lower cartridge portion provided with a chuck holding a semiconductor wafer as a device under test and an upper cartridge portion including a probe assembly provided with probes that can contact electrodes of the semiconductor wafer held on the chuck of the lower cartridge portion is constituted. This cartridge is placed in a thermostatic chamber in a state of holding the semiconductor wafer as a device under test therein, and a tester is connected to each cartridge. By doing so, a semiconductor wafer in each cartridge undergoes a wafer burn-in test.
Also, it is proposed that a lower cartridge portion and an upper cartridge portion are set as a cartridge in advance, and a semiconductor wafer as a device under test is built in these set lower cartridge portion and upper cartridge portion by an assembling/disassembling apparatus for simplification of the process of a wafer burn-in test and simplification of a test apparatus (e.g., refer to Patent Document 2). Further, an apparatus for automating assembly and disassembly of a cartridge and building and taking a semiconductor wafer in and out of the cartridge in relation to these is proposed (e.g., refer to Patent Document 3).
According to the aforementioned conventional burn-in test methods, as far as the electrodes of each semiconductor device of the semiconductor wafer as a device under test contact the respective probes of the probe assembly appropriately in the cartridge consisting of the lower cartridge portion and the upper cartridge portion, the semiconductor wafer is placed in the thermostatic chamber in a state of being connected to the tester appropriately. Thus, an appropriate burn-in test can be performed efficiently.
[Patent Document 1] Japanese Patent Appln. Public Disclosure No. H4-329653
[Patent Document 2] Japanese Patent Appln. Public Disclosure No. H2000-164654
[Patent Document 3] Japanese Patent Appln. Public Disclosure No. H2001-156129